ИСТИНА

An apparatus including a multiplier circuit and a multiplexing circuit. The multiplier circuit may be configured to multiply a first multiplicand and a second multiplicand based on a programmable base value and generate a plurality of intermediate values, each intermediate value representing a result of the multiplication reduced by a respective irreducible polynomial. The multiplexing circuit may be configured to generate an output in response to the plurality of intermediate values received from the multiplier circuit and the programmable base value.